1. Field of the Invention
Embodiments relate to a semiconductor integrated circuit and a method of manufacturing the same. More particularly, embodiments relate to a semiconductor integrated circuit that has a simplified manufacturing process and a method of manufacturing the same.
2. Description of the Related Art
With the high integration of semiconductor devices, sizes of metal-oxide semiconductor (MOS) devices are steadily decreasing, while their functionality has been improving. As high integration of semiconductor devices progresses, intervals between transistors in a plurality of transistors decrease. Therefore, research have been conducted on a method in which transistors are formed in a semiconductor substrate such that channel lengths are not decreased, even when the transistors are disposed at narrow intervals.
In order to form the transistors in the semiconductor substrate at small intervals, a width of a photoresist pattern used when forming trenches where gate electrodes of the transistors are disposed needs to decrease. However, reducing widths of the photoresist pattern depends on a resolution of a stepper. Accordingly, the following method has been explored. First, a photoresist pattern with openings having a relatively large width is formed. Second, an etching inductive material is applied to the openings. Third, an etching process is performed, resulting in two trenches for each opening. However, when two trenches are formed for each opening, an additional process that separates the two trenches from each other needs to be performed to prevent conductive material in each trench from short-circuiting. As a result, manufacturing process time and complexity increases.